rog-platform: add CPU and GPU tunings

rog-platform: add tunables to supported dat

Anime: fixes to how some power options work
This commit is contained in:
Luke D. Jones
2023-11-16 21:31:15 +13:00
parent b9c2d929b3
commit fa043adc99
10 changed files with 201 additions and 72 deletions

View File

@@ -8,6 +8,7 @@ use typeshare::typeshare;
use zbus::zvariant::Type;
use crate::error::{PlatformError, Result};
use crate::supported::PlatformSupportedFunctions;
use crate::{attr_bool, attr_string, attr_u8, to_device};
/// The "platform" device provides access to things like:
@@ -15,6 +16,7 @@ use crate::{attr_bool, attr_string, attr_u8, to_device};
/// - `egpu_enable`
/// - `panel_od`
/// - `gpu_mux`
/// - various CPU an GPU tunings
/// - `keyboard_mode`, set keyboard RGB mode and speed
/// - `keyboard_state`, set keyboard power states
#[derive(Debug, PartialEq, Eq, PartialOrd, Clone)]
@@ -34,12 +36,69 @@ impl AsusPlatform {
attr_bool!("gpu_mux_mode", path);
// This is technically the same as `platform_profile` since both are tied
// in-kernel
attr_u8!("throttle_thermal_policy", path);
attr_u8!(
/// This is technically the same as `platform_profile` since both are
/// tied in-kernel
"throttle_thermal_policy",
path
);
// The acpi platform_profile support
attr_string!("platform_profile", pp_path);
attr_string!(
/// The acpi platform_profile support
"platform_profile",
pp_path
);
attr_u8!(
/// Package Power Target total of CPU: PL1 on Intel, SPL on AMD.
/// Shown on Intel+Nvidia or AMD+Nvidia based systems:
/// * min=5, max=250
"ppt_pl1_spl",
path
);
attr_u8!(
/// Slow Package Power Tracking Limit of CPU: PL2 on Intel, SPPT,
/// on AMD. Shown on Intel+Nvidia or AMD+Nvidia based systems:
/// * min=5, max=250
"ppt_pl2_sppt",
path
);
attr_u8!(
/// Fast Package Power Tracking Limit of CPU. AMD+Nvidia only:
/// * min=5, max=250
"ppt_fppt",
path
);
attr_u8!(
/// APU SPPT limit. Shown on full AMD systems only:
/// * min=5, max=130
"ppt_apu_sppt",
path
);
attr_u8!(
/// Platform SPPT limit. Shown on full AMD systems only:
/// * min=5, max=130
"ppt_platform_sppt",
path
);
attr_u8!(
/// Dynamic boost limit of the Nvidia dGPU:
/// * min=5, max=25
"nv_dynamic_boost",
path
);
attr_u8!(
/// Target temperature limit of the Nvidia dGPU:
/// * min=75, max=87
"nv_temp_target",
path
);
pub fn new() -> Result<Self> {
let mut enumerator = udev::Enumerator::new().map_err(|err| {
@@ -73,6 +132,37 @@ impl AsusPlatform {
}
}
impl Default for AsusPlatform {
fn default() -> Self {
unsafe {
Self {
path: PathBuf::from_str("/this_shouldNeVErr_exisid").unwrap_unchecked(),
pp_path: PathBuf::from_str("/this_shouldNeVErr_exisid").unwrap_unchecked(),
}
}
}
}
impl From<AsusPlatform> for PlatformSupportedFunctions {
fn from(a: AsusPlatform) -> Self {
PlatformSupportedFunctions {
post_sound: false,
gpu_mux: a.has_gpu_mux_mode(),
panel_overdrive: a.has_panel_od(),
dgpu_disable: a.has_dgpu_disable(),
egpu_enable: a.has_egpu_enable(),
mini_led_mode: a.has_mini_led_mode(),
ppt_pl1_spl: a.has_ppt_pl1_spl(),
ppt_pl2_sppt: a.has_ppt_pl2_sppt(),
ppt_fppt: a.has_ppt_fppt(),
ppt_apu_sppt: a.has_ppt_apu_sppt(),
ppt_platform_sppt: a.has_ppt_platform_sppt(),
nv_dynamic_boost: a.has_nv_dynamic_boost(),
nv_temp_target: a.has_nv_temp_target(),
}
}
}
#[typeshare]
#[derive(Serialize, Deserialize, Default, Type, Debug, PartialEq, Eq, Clone, Copy)]
pub enum GpuMode {